(1) Field of the Invention
The present invention generally relates to surface-mount circuit devices. More particularly, this invention relates to a laminate circuit board substrate modified to have a localized stiffener on a surface opposite a surface-mount circuit device so as to improve the fatigue life of one or more solder joints securing the device to the substrate.
(2) Description of the Related Art
Electronic circuit assemblies are often required to be capable of surviving in hostile operating environments, including those commonly found in automotive and aerospace applications. Such assemblies often employ surface-mount (SM) integrated circuit (IC) devices, which are generally characterized as being electrically and mechanically attached to the substrate of a circuit assembly with one or more terminals or leads that are soldered to conductors on the substrate surface. A prominent example of a SM IC device is a flip chip which has bead-like terminals typically in the form of solder bumps along the perimeter of the chip. After registering a flip chip to its corresponding conductor pattern on a substrate, heating above the liquidus temperature of the solder causes the solder bumps to reflow, forming solder joints that secure the chip to the substrate and electrically interconnect the chip circuitry to the conductor pattern.
Due to the numerous functions typically performed by the microcircuitry of a flip chip, a relatively large number of solder joints are typically required, resulting in the joints being crowded along the edges of the chip. To reduce device profile and the overall size of circuit board assemblies, a current IC packaging trend is for smaller solder joints to reduce bump pitch, which also reduces device standoff height resulting in solder joints that are less compliant. Such size constraints result in solder joints of minimal size and therefore reduced strength. Complicating this is the fact that solder joints are subject to thermal stresses as a result of temperature fluctuations in the working environment of the assembly and differences in coefficients of thermal expansion (CTE) of the various materials used in the construction of the assembly. A CTE mismatch particularly exists for flip-chip-on-board (FCOB) processes in which a flip chip is mounted to an organic laminate circuit board, such as a printed wiring board (PWB) or printed circuit board (PCB). As a result of their multilayer laminate construction and compositions, such substrates typically have CTE's in the circuit plane of about 17 ppm/EC, which is significantly higher than CTE's of the materials (e.g., silicon, alumina, quartz, etc.) of which SM devices are formed, e.g., typically not higher than about 10 ppm/EC. Thermal stresses arising from this CTE mismatch can potentially fatigue and fracture the solder joints, particularly if the device is subject to many temperature excursions, high temperatures, and/or intense vibration.
To reduce and distribute stresses on their solder joints, SM devices mounted to laminate organic substrates are typically underfilled to encapsulate their solder joints. For example, epoxy resins containing a glass filler have been used as underfill materials for SM IC devices, including flip chips. The glass filler reduces the CTE of the underfill material in order to mitigate the thermal mismatch between the flip chip and circuit board. Other approaches to improving solder joint fatigue life include modifying the solder composition and increasing the solder bump (joint) height. While such approaches have the ability to improve solder joint fatigue life, further improvements would be desirable.